Low depth, low power carry lookahead adders using threshold logic
نویسندگان
چکیده
This paper describes a low power threshold logic-gate based on a capacitive input, charge recycling differential sense amplifier latch. The gate is shown to have low power dissipation and high operating speed, as well as robustness under process, temperature and supply voltage variations. This is followed by the main result, which is the development of a novel, low depth, carry lookahead addition scheme based on threshold logic. One such adder is also designed and simulated using the proposed gate. q 2002 Published by Elsevier Science Ltd.
منابع مشابه
Low depth carry lookahead addition using charge recycling threshold logic
The main result of this paper is the development of a low depth cany lookahead addition technique based on threshold logic. Two such adders are designed using the recently proposed charge recycling threshold logic gate. The adders are shown to have a very low logic depth, and significantly reduced area and power dissipation compared to other dynamic CMOS implementations.
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